2026 ASEE Annual Conference & Exposition

Development containers: a tool for authentic, scalable active learning in digital logic and computer architecture

Presented at Electrical and Computer Engineering Division (ECE) Technical Session 6

The bulk of topics in many introductory digital logic / computer architecture courses fall into two major thrusts: a) the concepts that support CPU implementations and b) the process by which programs can be represented in machine language and executed. Both areas can require significant infrastructure to convey, such as simulators/synthesis tools, cross compilers/assemblers, and, often, specialized hardware. Although there are a multitude of infrastructure options available, there are corresponding compromises that impact course scale, active learning, adoption and support costs, authenticity of the experience, and learning outcomes.

As part of a recent redesign of an introductory course in digital logic and computer design, the authors explored the use of development containers (dev containers) and open source resources to provide scalable, low cost, authentic experiences with concepts in both CPU implementation and program representation / execution. Dev containers are, essentially, a blueprint for a full-featured, integrated development environment. They rely on contemporary containerization (e.g., Docker) for portability and consistency. Dev containers can specify both specific versions of underlying tools (e.g., a specific version of a synthesis tool) as well as features of the development environment, like inclusion of a waveform viewer.

The dev container used in this work includes support for Hardware Description Language development (Verilog) and work with RISC-V (assembly and C; simulation and deployment to hardware). The use of dev containers allowed active learning activities that were not feasible previously, such as launching a full-featured development environment on student laptops within the first 5 minutes of class sessions. The work includes features that: 1) distinguish it from other academic uses of development containers, such as seamless simulation of logic gate behavior, visualization of logic signals, and deployment to low-cost FPGA hardware; 2) distinguish it from non-academic tools by providing pedagogical support; 3) distinguish it from open source tools in many comparable courses, like the combination of easy adoption coupled with support for hardware deployment; and 4) are platform agnostic, but develop transferable skills. The approach has undergone four semesters of refinement, has been used by more than 250 students, has significantly reduced the barrier to access course content, and can easily be adopted and adapted by others. The paper outlines the infrastructure used and the types of activities that it facilitated as well as providing guidance for others who may want to adopt the environment discussed or a similar approach.

Authors
  1. Bill Siever Orcid 16x16http://orcid.org/0000-0001-9124-8922 Washington University in St. Louis [biography]
  2. James Feher Orcid 16x16http://orcid.org/0009-0002-3605-621X Washington University in St. Louis
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