2023 ASEE Annual Conference & Exposition

RISC-V FPGA, also written RVfpga, is a freely available course that provides instructions and resources, including the unobfuscated RISC-V system-on-chip (SoC) itself, to show how to readily use and understand a RISC-V SoC, from writing C and assembly programs down to understanding and expanding the system. These materials bridge the gap between the availability of the open and royalty-free RISC-V instruction set architecture (ISA) and actually being able to use and experiment with a commercial RISC-V processor/SoC and the RISC-V toolchain. In addition to providing the SoC source code in Verilog/SystemVerilog and showing how to readily use the RISC-V toolchain to compile, debug, and load C and RISC-V assembly programs onto the SoC, both in simulation and on an FPGA (field programmable gate array), RVfpga shows how to expand the system to add peripherals and how to explore and modify the microarchitecture, including adding instructions, measuring performance using built-in performance counters, and exploring microarchitectural features, from the most fundamental aspects, such as pipelining and caches, to other more specific and advanced capabilities, such as superscalar execution, non-blocking loads and divide operations, secondary ALUs for resolving data hazards, unaligned loads and stores, scratch pad memories for both instruction and data, and advanced branch prediction. We also show how to use several simulators: the Whisper instruction set simulator (ISS) and three Verilator-based simulators: RVfpga-Trace, RVfpga-ViDBo, and RVfpga-Pipeline. The simulators enable users to fully use the materials without the expense of purchasing an FPGA board; thus, the course may be completed without cost. This paper also describes an RVfpga EdX MOOC (massive open online course) that we are completing, which includes ten in-depth chapters, accompanying videos and tutorials, and exercises. This online course can be used on its own or as a guide to instructors in how to present and teach the RVfpga content. In addition to these materials, we have also run ten 1-day RVfpga workshops that were taught world-wide over the past year. The RVfpga materials are most typically implemented as a two-semester course: the first being a junior-level course in digital design, computer architecture, and embedded systems with a follow-on course, at the senior/master’s level, in microarchitecture, but the materials may also be used in a condensed 1-semester course or for self-study.